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Figure 12: Ultra DMA Data-In Burst Host Pause Timing
Notes:
1.
2.
The host may assert STOP to request termination of the Ultra DMA burst no sooner than t RP after – HDMARDY is
negated.
After negating – HDMARDY, the host may receive zero, one, two, or three more data words from the device.
6.5.4.4.4 Device Terminating an Ultra DMA Data-In Burst
The device terminates an Ultra DMA Data-In burst by following the steps lettered below. The timing diagram is
shown in Figure 13: Ultra DMA Data-In Burst Device Termination Timing. The timing parameters are specified in
Table 26: Ultra DMA Data Burst Timing Requirements and are described in Table 27: Ultra DMA Data Burst Timing
Descriptions.
The following steps shall occur in the order they are listed unless otherwise specifically allowed:
a) The device shall not pause an Ultra DMA burst until at least one data word of an Ultra
b) The device shall pause an Ultra DMA burst by not generating DSTROBE edges.
c)
NOTE – The host shall not immediately assert STOP to initiate Ultra DMA burst termination when the device
stops generating STROBE edges. If the device does not negate DMARQ, in order to initiate ULTRA DMA burst
termination, the host shall negate
d) The device shall resume an Ultra DMA burst by generating a DSTROBE edge.
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-440_data_sheet_CF-HxBU_Rev100.doc
Page 33 of 102
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